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 MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage Quiet CMOS Octal Buffer
(3-State, Inverting)
The MC74LVQ240 is a high performance, inverting octal buffer operating from a 2.7 to 3.6V supply. The MC74LVQ240 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Current drive capability is 12mA at the outputs. The Output Enable (OE) input, when HIGH, disables the output by placing them in a HIGH Z condition.
MC74LVQ240
LVQ
LOW-VOLTAGE CMOS OCTAL BUFFER
20 1
* Designed for 2.7 to 3.6V VCC Operation - Ideal for Low Power/Low
Noise Applications * Guaranteed Simultaneous Switching Noise Level and Dynamic Threshold Performance * Guaranteed Skew Specifications
* Guaranteed Incident Wave Switching into 75 * Low Static Supply Current (10A) Substantially Reduces System Power
Requirements * Latchup Performance Exceeds 500mA
DW SUFFIX PLASTIC SOIC CASE 751D-04
* ESD Performance: Human Body Model >2000V
20 1
M SUFFIX PLASTIC SOIC EIAJ CASE 967-01
Pinout: 20-Lead (Top View)
VCC 20 2OE 19 1O0 18 2D0 17 1O1 16 2D1 15 1O2 14 2D2 13 1O3 12 2D3 11
20 1
SD SUFFIX PLASTIC SSOP CASE 940C-03
20 1
DT SUFFIX PLASTIC TSSOP CASE 948E-02
1 1OE
2 1D0
3 2O0
4 1D1
5 2O1
6 1D2
7 2O2
8 1D3
9 2O3
10 GND
PIN NAMES
Pins nOE 1Dn, 2Dn 1On, 2On Function Output Enable Inputs Data Inputs 3-State Outputs
12/95
(c) Motorola, Inc. 1995
1
REV 2
MC74LVQ240
LOGIC DIAGRAM
1
1OE
1D0
2
18
1O0
1D1
4
16
1O1
1D2
6
14
1O2
1D3
8
12
1O3
2OE
19
2D0
17
3
2O0
2D1
15
5
2O1
2D2
13
7
2O2
2D3
11
9
2O3
INPUTS 1OE 2OE L L H 1Dn 2Dn L H X
OUTPUTS 1On, 2On L H Z
H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level and Transitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs
MOTOROLA
2
ECLinPS and ECLinPS Lite DL140 -- Rev 3
MC74LVQ240
ABSOLUTE MAXIMUM RATINGS*
Symbol VCC VI VO IIK Parameter DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current Value -0.5 to +7.0 -0.5 VI VCC + 0.5V -0.5 VO VCC + 0.5 -20 +20 IOK DC Output Diode Current -20 +20 IO ICC IGND TSTG DC Output Source/Sink Current DC Supply Current DC Ground Current Storage Temperature Range 50 400 400 -65 to +150 Output in HIGH or LOW State VI = -0.5V VI = VCC + 0.5V VO = -0.5V VI = VCC + 0.5V Condition Unit V V V mA mA mA mA mA mA mA C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO TA V/t Supply Voltage Input Voltage Output Voltage Operating Free-Air Temperature Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V Parameter Min 2.0 0 0 -40 0 Typ 3.3 Max 3.6 VCC VCC +85 125 Unit V V V C mV/ns
DC ELECTRICAL CHARACTERISTICS
TA = -40C to +85C Symbol VIH VIL VOH Characteristic HIGH Level Input Voltage (Note 1) LOW Level Input Voltage (Note 1) HIGH Level Output Voltage Condition 2.7V VCC 3.6V, VO = 0.1V or VCC - 0.1V 2.7V VCC 3.6V, VO = 0.1V or VCC - 0.1V 2.7V VCC 3.6V; IOH = -50A VCC = 2.7V; IOH = -12mA VCC = 3.0V; IOH = -12mA VOL LOW Level Output Voltage 2.7V VCC 3.6V; IOL = 50A 2.7V VCC 3.6V; IOL= 12mA II IOZ IOLD IOHD ICC Quiescent Supply Current Input Leakage Current Maximum 3-State Leakage Current Minimum Dynamic Output Current (Note 2) 2.7V VCC 3.6V; VI= VCC, GND VI(OE) = VIL, VIH; VI, VO= VCC, GND VCC = 3.6V; VOLD = 0.8V Max VCC = 3.6V; VOHD = 2.0V Min 2.7V VCC 3.6V; VI = VCC, GND VCC - 0.1 2.2 2.48 0.1 0.4 1.0 2.5 36 -25 10 A A mA mA A V Min 2.0 0.8 Max Unit V V V
1. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH 2.4V, VIL 0.5V. 2. Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed. Maximum test duration is 2ms, one output loaded at a time.
ECLinPS and ECLinPS Lite DL140 -- Rev 3
3
MOTOROLA
MC74LVQ240
DYNAMIC SWITCHING CHARACTERISTICS (VCC = 3.3V)
TA = +25C Symbol VOLP VOLV VIHD VILD Characteristic Dynamic LOW Peak Voltage (Note 1) Dynamic LOW Valley Voltage (Note 1) High Level Dynamic Input Voltage (Note 2) Low Level Dynamic Input Voltage (Note 2) Condition CL = 50pF, VIH = 3.3V, VIL = 0V CL = 50pF, VIH = 3.3V, VIL = 0V Input-Under-Test Switching 0V to Threshold, f=1MHz Input-Under-Test Switching 3.3V to Threshold, f=1MHz Min Typ 0.6 -0.5 1.5 1.5 Max 1.0 -1.0 2.0 0.8 Unit V V V V
1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH-to-LOW. The remaining output is measured in the LOW state. 2. Number of data inputs is defined as "n" switching, "n-1" inputs switching 0V to 3.3V.
AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500)
Limits TA = +25C VCC = 3.0V to 3.6V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Propagation Delay Input to Output Output Enable Time to High and Low Level Output Disable Time From High and Low Level Min 2.0 2.0 2.5 2.5 1.0 1.0 Typ 6.0 6.0 7.5 7.5 7.0 7.0 Max 9.5 9.5 11.0 11.0 10.5 10.5 VCC = 2.7V Min 2.0 2.0 2.5 2.5 1.0 1.0 Typ 7.0 7.0 9.0 9.0 9.0 9.0 Max 11.0 11.0 13.0 13.0 13.0 13.0 TA = -40C to +85C VCC = 3.0V to 3.6V Min 2.0 2.0 2.5 2.5 1.0 1.0 Max 10.5 10.5 12.0 12.0 11.5 11.5 VCC = 2.7V Max 12.0 12.0 14.0 14.0 14.0 14.0 Unit ns ns ns
tOSHL Output-to-Output Skew 1.0 1.5 1.0 1.5 1.5 ns tOSLH (Note 1) 1.0 1.5 1.0 1.5 1.5 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design.
CAPACITIVE CHARACTERISTICS
Symbol CPD CIN Parameter Power Dissipation Capacitance Input Capacitance Condition 10MHz, VCC = 3.3V, VI = 0V or VCC VCC = Open, VI = 0V or VCC Typical 22 4.5 Unit pF pF
MOTOROLA
4
ECLinPS and ECLinPS Lite DL140 -- Rev 3
MC74LVQ240
VCC 1Dn, 2Dn 50% VCC 50% VCC 0V tPLH 1On, 2On 50% VCC tPHL VOH 50% VCC VOL WAVEFORM 1 - PROPAGATION DELAYS tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
VCC 1OE, 2OE 50% VCC 50% VCC 0V tPZH 1On, 2On 50% VCC tPHZ VCC VOH - 0.3V
tPZL 50% VCC
tPLZ
1On, 2On
VOL + 0.3V GND WAVEFORM 2 - OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
Figure 1. AC Waveforms
VCC 2 * VCC PULSE GENERATOR RT DUT CL R1 RL OPEN
TEST tPLH, tPHL tPZL, tPLZ Open Collector/Drain tPLH and tPHL tPZH, tPHZ
SWITCH Open 2 * VCC 2 * VCC Open
CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
Figure 2. Test Circuit
ECLinPS and ECLinPS Lite DL140 -- Rev 3
5
MOTOROLA
MC74LVQ240
OUTLINE DIMENSIONS
DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D-04 ISSUE E -A -
20 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0 7 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0 7 0.395 0.415 0.010 0.029
-B -
1 10
P 10 PL 0.010 (0.25)
M
B
M
D
20 PL
J
M
0.010 (0.25)
T
A
S
B
S
F R X 45 C -T G
18 PL SEATING - PLANE
K
M
M SUFFIX PLASTIC SOIC EIAJ PACKAGE CASE 967-01 ISSUE O
NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5 THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --0.81 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.032
20
11
LE Q1 E HE M_ L DETAIL P
1
10
Z D e A VIEW P
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
MOTOROLA
6
ECLinPS and ECLinPS Lite DL140 -- Rev 3
MC74LVQ240
OUTLINE DIMENSIONS
SD SUFFIX PLASTIC SSOP PACKAGE CASE 940C-03 ISSUE B
20X
K REF 0.12 (0.005)
M
TU
S
V
S
0.25 (0.010) N
L/2 L
PIN 1 IDENT
20
11
M B N F
1
10
DETAIL E K
A -V- 0.20 (0.008)
M
-U- J
S
NOTES: 13 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 14 CONTROLLING DIMENSION: MILLIMETER. 15 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 16 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 17 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF K DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR INTRUSION SHALL NOT REDUCE DIMENSION K BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL CONDITION. 18 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 19 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 7.07 7.33 5.20 5.38 1.73 1.99 0.05 0.21 0.63 0.95 0.65 BSC 0.59 0.75 0.09 0.20 0.09 0.16 0.25 0.38 0.25 0.33 7.65 7.90 0_ 8_ INCHES MIN MAX 0.278 0.288 0.205 0.212 0.068 0.078 0.002 0.008 0.024 0.037 0.026 BSC 0.023 0.030 0.003 0.008 0.003 0.006 0.010 0.015 0.010 0.013 0.301 0.311 0_ 8_
TU
SECTION N-N -W-
0.076 (0.003) -T-
SEATING PLANE
C D G H
DETAIL E
20X
K REF
M
DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948E-02 ISSUE A TU
S
0.15 (0.006) T U
S
0.10 (0.004)
V
S
2X
L/2
20
11
B L
PIN 1 IDENT 1 10
J J1
-U-
SECTION N-N
N 0.15 (0.006) T U
S
A -V- N F
DETAIL E C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
ECLinPS and ECLinPS Lite DL140 -- Rev 3
7
EEE CCC EEE CCC EEE CCC EEE CCC
K1 K K1 M
J1
0.25 (0.010)
NOTES: 6 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 7 CONTROLLING DIMENSION: MILLIMETER. 8 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 9 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 10 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 12 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 1.20 --- 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 0.047 --- 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
IIII IIII IIII IIII IIII
-W-
DIM A B C D F G H J J1 K K1 L M
MOTOROLA
MC74LVQ240
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us: USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
MOTOROLA 8
*MC74LVQ240/D*
MC74LVQ240/D ECLinPS and ECLinPS Lite DL140 -- Rev 3


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